The Euler Family The Euler platform is a family of high-performance processors optimized for both general-purpose and AI inference tasks, utilizing cutting-edge technology. The Euler family offers processors ranging from 96 cores up to 256 cores, operating at up to 3.3 GHz. Each core is single-threaded with a 16KB L1 Instruction-cache, 96KB L1 Data-cache and 2MB L2 cache, as well as 64MB of shared memory. Using CMOS+ technology deliver power efficiency and scalability for the deployment of dense compute for AI and ML tasks (FP16, BF16, INT16, INT8), especially suited for hyperscale data centers. CMOS+ is a novel chip design technology that comprises RTL optimization, logic synthesis optimization, new, proprietary standard cells, and more. It is fully compatible with conventional CMOS fabrication, as well as the common EDA tools. It is future-proof and delivers a PPA advantage independently of the CMOS technology node, as well as backward compatibility with mature CMOS technology nodes
